1. Field of the Invention
The present invention relates generally to the field of bipolar power transistors.
2. Background Art
Bipolar transistors are known to have several performance limitations. One such limitation is called "emitter crowding" which results in undesired "high injection effects" in turn causing a fall-off in the magnitude of bipolar transistor current gain. A second limitation is the forward Safe Operating Area performance. This is a thermal instability caused by a non-uniform distribution of current in the transistor. This nonuniformity causes a localized heating effect which will augment the concentration of current, thereby causing the device to self destruct. This effect is seen in both the low and high current regimes. Emitter crowding, high injection effects, and fall-off of transistor current gain, and forward SOA performance are discussed in more detail below.
FIG. 1A illustrates a prior art bipolar transistor structure. Two base contacts 16 and 18 are shown contacting base region 12. More than one base contact is used in order to reduce the equivalent base resistance. Emitter contact 20 is shown contacting emitter island 14. Oxide layer 24 is used as an insulator. Region 22 serves as both a collector for bipolar transistor 10 and also as a substrate for transistor 10. Two resistors r.sub.b and a resistor r'.sub.b represent the distributed resistance of base 12. Because of the base distributed resistance, a forward bias placed across the emitter-base junction is not uniform and varies with position according to the voltage drop in the distributed base resistances r.sub.b and r'.sub.b. In particular, the forward bias on the emitter-base junction is largest at the corners of emitter island 14, near base contacts 16 and 18.
The variation in the forward bias in the emitter-base junction is illustrated by the simplified model shown in FIG. 1B. In FIG. 1B, a PNP bipolar transistor is shown. However, it is apparent to those skilled in the art that, with a reversal of voltage polarities, the analysis below applies just as well to an NPN bipolar transistor. Point E represents emitter contact 20 and point B represent base contact 18. Point A is located at the middle of distributed resistance r'.sub.b. Point D is the point at which resistors r.sub.b and r'.sub.b meet. The forward bias on the emitter-base junction at point A is approximately given by equation (1) below: EQU V.sub.EA =V.sub.EB -I.sub.B (R.sub.AD +R.sub.DB) (1)
However, the forward bias on the emitter-base junction at point D is given by equation (2) below: EQU V.sub.ED =V.sub.EB -I.sub.B R.sub.DB ( 2)
Thus, V.sub.ED (the voltage at point D) can be significantly closer to VEB (the voltage applied across the emitter and base contacts) than V.sub.EA (the voltage at point A). Thus, the forward bias is largest at the corner of emitter 14 as opposed to its center. Accordingly, the injection of majority carriers, in this case the holes, from emitter 14 into base 12 is largest at the corners of emitter 14. This effect is called "emitter crowding," which strongly impairs the performance of bipolar transistor 10. For example, undesirable "high injection effects" become dominant at the corners of emitter 14 before the overall emitter current is very large.
The most notable undesirable high injection effect is a decrease in transistor current gain. Transistor current gain is defined as the ratio of output collector current to input base current. The primary cause of the decrease in the transistor current gain is the increase of injected emitter majority carriers, in this example the holes, into the base. As the density of excess holes injected into the base becomes large, the matching excess base electron density causes an increase in the effective doping concentration of the base. The increase in the effective doping concentration of the base causes a reduction in emitter injection efficiency. The emitter injection efficiency is the fraction of emitter current resulting from the emitter majority carrier current. The reduction in emitter injection efficiency is due to the increase of the current resulting from the emitter minority carriers, in this case the electrons, into emitter 14. The decrease in emitter injection efficiency directly reduces the collector current and hence the transistor current gain.
Thus, in the prior art bipolar transistors, transistor current gain decreases before the overall collector current is very large, primarily because of the localized domination of high injection effects at emitter corners. Curve (A) in FIG. 2 illustrates the fall-off of the prior art's bipolar transistor current gain as collector current increases. (Note that the reduction of the current gain at low collector currents shown in FIG. 2 is due to transistor phenomena which are not of interest in the present application.) Power transistors are particularly subject to the current gain impairment since power transistors are required to supply a high current output.
To applicants' knowledge, the prior art has not disclosed the solution set forth in the present invention to improve the uniformity of bipolar transistor collector current distribution and forward safe operating area characteristics.
Transistors are utilized in the prior art in which a multiplicity of discrete emitter areas are arranged in rows and columns and are diffused in the base layer. The emitters are made small so as to minimize the lateral base resistance effects. In order to assure uniform current distribution in the device, some devices use ballast resistors which are connected in series with the emitter islands to prevent a single emitter from carrying excess current. These resistors tend to impact high current performance by increasing the collector saturation voltage, and by increasing the gain roll-off with current.
Transistors are also utilized in the prior art in which a grid of P+ material in an NPN transistor is formed in the base layer around base areas surrounding emitter islands so as to provide greater conductivity between the base contact areas and the base material.
Gilbert, U.S. Pat. No. 3,582,726, describes a high-frequency power transistor having a plurality of discrete base areas. Base and emitter areas are grouped in columns and their contact areas extend through an insulated layer. Gilbert is directed to reducing the emitter area. Kisinko, U.S. Pat. No. 3,460,009, describes a high current gain power transistor. However, Kisinko is directed to use of a base as thin as possible.
As exemplified by the above prior art attempts, the conventional methods to address the current gain problem focus on reducing the base depth, reducing resistance from center of the base to base contacts, and increasing emitter periphery to emitter area ratio. None of these methods has proven to be effective; the conventional bipolar transistor still has a large fall-off in current gain at high collector currents.
Thus, there is need in the art for an effective way of preserving bipolar transistor current gain at high collector currents. This need is particularly long-felt in the area of power bipolar transistors. The invention offers an effective method of fabricating a bipolar transistor, and a bipolar transistor structure, which overcome the above shortcomings of the prior art. The invention results in a transistor that substantially reduces non-uniform current density problems, and thus maintains a high current gain at high collector currents.
Another limitation in the prior art is the performance of the transistor at low voltage with high current, and at high voltage with low current. These performance points are part of the forward Safe Operating Area (SOA) characteristics of a transistor. The low voltage and high current regime is susceptible to current concentrating into a "filament," which is localized high concentration of current. This filament creates a localized hot spot which in turn will increase the current and eventually cause device failure. The high voltage and low current regime is also susceptible to the same mechanism because of the amount of heat generated by the current flow across a high potential.
The prior art employs an added resistance, called ballast resistors, in the emitters, the base, or both to prevent current from concentrating into any single point in the transistor structure, thereby providing improved SOA performance. This technique causes a degradation in the saturation voltage, and in the current gain performance. The present invention does not use any added resistance, but rather accomplishes the improved SOA performance by causing the current flow to become uniform within the base region, or adjacent to the base junction. This uniform current distribution prevents any single emitter from carrying excess current.
Thus, there is a need in the art for an effective way of increasing the SOA performance in bipolar transistors at both low and high current levels without sacrificing other performance characteristics. The invention offers an effective method of fabricating a bipolar transistor, and a bipolar transistor structure, which overcome the above shortcomings of the prior art. The invention results in a transistor which eliminates the need for ballast resistors, thereby providing improved SOA performance without the limitations caused by the added resistance of ballast resistors.